TITLE

Synthesis Comparison of Karatsuba Multiplierusing Polynomial Multiplication, Vedic Multiplier and Classical Multiplier

AUTHOR(S)
Mishra, Sudhanshu; Pradhan, Manoranjan
PUB. DATE
March 2012
SOURCE
International Journal of Computer Applications;Mar2012, Vol. 41, p13
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
In this paper, the authors have compared the efficiency of the Karatsuba multiplier using polynomial multiplication with the multiplier implementing Vedic mathematics formulae (sutras), specifically the Nikhilam sutra. The multipliers have been implemented using Spartan 2 xc2s200 pq208 FPGA device having speed grade of -6. The proposed Karatsuba multiplier has been found to have better efficiency than the multipliers involving Vedic mathematics formulae.
ACCESSION #
75145165

 

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